(1) Field of the Invention
This invention relates to a high-voltage circuit for field-effect transistors, and more particularly to a high-voltage circuit for insulated gate field-effect transistors (hereinafter, briefly referred to as "MOSFETs").
(2) Description of the Prior Art
It has been known that by using a circuit as shown in FIG. 1, wherein two MOSFETs 1 and 2 are connected in a totem pole arrangement and wherein a voltage across both terminals 5 and 6 is divided by a resistance ratio, the apparent breakdown voltage can be made higher than in the single MOSFET.
If a series connection of the MOSFETs 1 and 2 is provided without the connection of resistors 3 and 4 shown in FIG. 1, when a voltage is applied across the terminals 5 and 6, the potential of a point 7 rises upon turning-on of the MOSFET 2, and the breakdown voltage across the terminals 5 and 6 is limited by the device breakdown voltage of the MOSFET 1. Upon turning-off of the MOSFET 2, a voltage is applied across the terminals 6 and 7, and the breakdown voltage across the terminals 5 and 6 is limited by the device breakdown voltage of the MOSFET 2.
Therefore, the resistors 3 and 4 are connected so as to make it possible to determine the potentials of terminals 7 and 8 by the resistance ratio. As a result, it is possible to select the resistances so that the breakdown voltage across the terminals 5 and 6 may become the sum of the breakdown voltages of the MOSFETs 1 and 2. That is, it is possible to control the potential of the terminal 7. Thus, a high breakdown voltage circuit is realized by the use of a plurality of MOSFETs.
With the circuit of FIG. 1, however, no current flows before the voltage across the terminals 7 and 8 becomes at least the threshold voltage V.sub.T of the MOSFET 2 in order to turn this MOSFET "on", so that the rise characteristics are inferior.
That is, the high breakdown voltage of the circuit in FIG. 1 is achieved on the ground that the potential of the terminal 8 is determined by the ratio of the resistances 3 and 4, while the potential of the terminal 7 is fixed. On the other hand, the rise of the current--voltage characteristics (called the "on-resistance") of the circuit is very inferior because current does not flow until the MOSFET 2 turns "on" owing to the potential difference across the terminals 7 and 8.
Regarding a single MOSFET shown in FIG. 2, current--voltage characteristics across terminals 5' and 6' at the time when the voltage of a gate 9'.sbsp.-5 V are shown in FIG. 3A, and current--voltage characteristics at the time when the gate voltage is varied are shown in FIG. 3B. Regarding the circuit of FIG. 1, the current--voltage characteristics across the terminals 5 and 6 at the time when a gate voltage (the voltage of a terminal 9) is -5 V are shown in FIG. 4A, and the current--voltage characteristics at the time when the gate voltage is varied are shown in FIG. 4B. As is apparent from FIGS. 3A, 3B, 4A and 4B, with the circuit of FIG. 1, the breakdown voltage is increased (enhanced from 200 V to 400 V), but the current--voltage characteristics in the case of varying the gate voltage are degraded. This indicates that the on-resistance is increased in the circuit form of FIG. 1.
In FIGS. 1 and 2, the MOSFETs 1, 2 and 1' are N-channel MOSFETs of the enhancement mode.